Lenze EVS9332xK Bedienungsanleitung PDF herunterladen (Seite 338)

100

101

Function library

Function blocks

3−310

EDSVS9332K−EXT EN 4.0

Interpolation cycle time (INTPOL. CYCLE)

The FB interpolates the input signals (C1124, C1125, C1126) between the sync telegrams or sync

signals and transmits them to the corresponding output. This ensures an optimum signal course with

regard to the internal processing cycle (e. g. minimising signal jumps in the output variable when

operating with high sync cycles).

The interpolation is restarted with every sync signal (LOW−HIGH edge).

Code Value Function

C1121/2 1 ... 13 ms Definition of the interpolation cycles/steps

 C1120 = 1

– C1121/2 has no effect.

– The interpolation cycles are derived from the sync cycle (C1121/1).

 C1120 = 2

– The interpolation cycle can be selected irrespective of the sync cycle.

– The parameter setting of C1121/2 must be selected according to the cycle of the process value

input.

GND3

GND2

GND1

CANNEL 3

SYNC1-OUT3

[x.x%; 1ms]

CANNEL 2

SYNC1-IN3

[x.x%; 1ms]

CANNEL 1

SYNC - SIGNAL

[10V; 1ms]

SYNC

INTPOL

9300kur095

Fig. 3−251 Interpolation example

See Fig. 3−251:

An analog value at SYNC1−IN3 is output as an interpolated value at SYNC1−OUT3.

l Sync cycle (C1121/1) = 4 ms

l Interpol. cycle (C1121/2) = process cycle = 2 ms

l Phase displacement (C1123/1) = 0 ms

1 2 ... 333 334 335 336 337 338 339 340 341 342 343 ... 385 386

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